1. Cache and interconncect architectures in multiprocessord
Author: / edited by Michel Dubois and Shreekant S. Thakkar
Library: Central Library and Documents Center of Tehran University (Tehran)
Subject: Computer networks protocols -- Congresses,Multiprocessors -- Congresses,Computer network architectures -- Congresses
Classification :
TK
5105
.
5
.
C33
1990
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2. Selected reprints on dataflow and reduction architectures
Author: / edited by S.S. Thakkar
Library: Library of Campus2 Colleges of Engineering of Tehran University (Tehran)
Subject: Computer architecture,Data structures (Computer science)
Classification :
QA
76
.
9
.
A73S45
1987
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